FPC Packaging Solder Paste：Reliability of Aluminium Bond Wires
2022-03-08
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FPC Packaging Solder Paste：Reliability of Aluminium Bond Wires
Solder Paste and Ultra-Fine Solder Manufacturer-Shenzhen Fitech is a comprehensive solder paste supplier integrating production, sales, research, and service of solder paste, epoxy solder paste, and solder powder. Fitech is the leading unit for the formulation of solder powder standards of the Ministry of Industry and Information Technology. Fitech's products include ultra-fine lead-free printing solder paste, ultra-fine lead-free dispensing solder paste, ultra-fine lead-free jetting solder paste, ultra-fine lead-free pin transfer solder paste, no-clean solder paste, water-soluble solder paste, high-temperature solder paste, medium-temperature solder paste, low-temperature solder paste, etc. Fitech can manufacture electronic-grade packaging solder powders with particle sizes from T2-T10.
The basic structure of the power module is shown in the figure below and will not be explained in this article. Generally speaking, the bond wires and the solder layer on the bottom of the chip are the weakness of power cycling testing. We will focus on the failure modes of the bond wires.
How to conduct aging for all the bonding wires together in the power cycle test and reduce the influences of the solder layer has become the trouble for the researchers.
Through the experimental comparison, M.Junghaenel found that the device's solder layer and bond wire failure have different sensitivities to the junction temperature difference delta Tj during power cycling. The greater the junction temperature differences, the greater the effects on the bond wires. The solder layer is more sensitive to the maximum junction temperature.
Apparently, using Ag-sintering or diffusion solder directly to replace traditional solder can effectively age the aluminum bond wires.
The failure mode of aluminum bonding wires in power cycle test includes bonding wire lift-off and pin fracture.
The bond wire lift-off is caused by the mismatch of thermal expansion coefficients (CTE mismatch) between the aluminum metal wires and the silicon chips, resulting in stress cracking at the edge of the bonding position. During the aging test, the thickness of the particles along the pin surface expands (due to the different characteristics of the key material and metal layer), eventually causing the lift-off of pins.
The main reason for the pin fracture is that the bond wires are exposed to thermal stress and electromagnetic force during power cycling, resulting in the deflection of the wire position and angle and the deformation of the bond wires.
The pin fracture is not a common failure mode of the power cycle test of a silicone filling module.
G. Zeng conducted a comparative test of TO-247 devices and found that the plastic packaging material has a significant impact on the failure mechanism of the bonding wire. In plastic encapsulated devices, the failure mode of the bond wires is pin fracture, while the bond surface remains well connected.
When the plastic encapsulated material was removed and tested under the same conditions, the failure mode of the critical wire changed from pin fracture to wire lift-off. N.Jiang also tested other rigid packaging material (ceramic) modules.
During the test, the aging (roughness change) of the aluminum metal layer on the chip surface attracted the attention of many researchers. The die reconfiguration caused by temperature variation and CTE mismatch is the mechanism.
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Some researchers suggest that the roughness of the metal layer is the main reason for the steady rise of VCE at the early stage of the power cycling test. The roughness change of the metal layer will significantly increase the resistivity of the metal layer. Experiments confirmed whether changes in the roughness of the metal layer during power cycling could accelerate bondline exfoliation.
N.Jiang combined power cycle test and critical thrust test and extracted equipment with different power cycle numbers for critical thrust test. It was found that the critical and chip connections would steadily degrade during the test, and the micrographs of the chip surface also proved the growth of critical cracks.
Source from：广东能芯, retrieved by Shenzhen Fitech
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